The invention relates to a method to etch a deposited material to expose buried features, wherein the etched surface is substantially planar. A minimal step or no step may be created between the exposed features and the deposited material.
In the fabrication of semiconductor devices on a wafer, there are times when a surface must be as planar as possible. This need frequently arises, for example, during the fabrication of monolithic three dimensional memory arrays, in which multiple memory levels are formed, each level constructed on top of previously formed memory levels. When constructing monolithic three dimensional memory arrays, it has become usual to perform such planarization using chemical mechanical planarization (CMP).
CMP has significant disadvantages, however. Compared to etchback, CMP is relatively expensive and slow, it can leave behind slurry defects on the polished surface, and CMP endpoint detection is relatively imprecise.
There is a need, therefore, to improve planarization methods.